BIST Embedded Master Slave Communication Design Using SPI Protocol

AUTHOR(S)

G. Anitha Rani, N Yaswanth Reddy, C Govinda Pavan Kumar, R Tejaswari,V Yaswanth

DOI: https://doi.org/10.46647/ijetms.2023.v07si01.009

ABSTRACT
The Serial-Peripheral Interface(SPI) Protocol is an interface that enables the serial(one bit at a time) exchange of data between two devices, one called a master and the other called a slave. An SPI operates in full duplex mode. It is also called as synchronous serial interface specification is used for communication between single master and single/multiple slaves. A self-testability feature for SPI modules is required because of the rise in the number of slaves, which increases circuit complexity and calls for testing for fault-free circuits. The solution for self-test in circuits is built-in self-test (BIST), which also lowers the cost of testing and maintenance. This paper introduces the design of a BIST embedded SPI module with a single master and single slave configuration. 8-bit data is sent over the module, and the circuit under test (CUT) is self-tested using the BIST feature to ensure that it is working properly. For applications like Application Specific Integrated Circuits (ASICs) or System on Chip, this SPI module was created using the Verilog Hardware Description Language (HDL) on an EDA playground platform (SOC).

Page No: 55 - 62

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How to Cite This Article:
G. Anitha Rani, N Yaswanth Reddy, C Govinda Pavan Kumar, R Tejaswari,V Yaswanth . BIST Embedded Master Slave Communication Design Using SPI Protocol . ijetms;7(s1):55-62. DOI: 10.46647/ijetms.2023.v07si01.009